How to support the reverse execution of floating-point operations?

The final issue for optimistic parallel PRC simulations concerns the reverse execution of floating-point operations. Floating-point operations, even simple increment and decrement, can result in bit loss if the relative exponents of the two operands are sufficiently far apart. Our proposed solution to this problem is to perform floating-point calculations at a higher precision, but test and utilize values at a ``casted'' lower precision. For example, most systems will represents timestamps as a double. For our system, we will utilize a long double type which provides between 4 and 8 additional bytes of precision, depending on the architecture. We choose the long double type because of its high-availability on most computer systems, despite not being a standard. Using this scheme, all comparisons on floating-point numbers will be done at the lower precision of double. This scheme will preclude bit loss over a range of reasonable values, but will introduce larger overheads. Understanding the performance impact on simulator performance as a result of utilizing higher-precision floating-point representation schemes will be studied by this research project.